
CompuLab Ltd. FACE Modules – HW Specifications Page 13 of 63
Clock Request for PCI Express 100 MHz
Clocks
PCI Express (x1) Gen2 (up to 5Gbps)
differential transmit pair 3
PCI Express (x1) Gen2 (up to 5Gbps)
differential receive pair 3
PCI Express Wake Event from Device to Host
SPI interface external control signal
PCI Express (x1) Gen2 (up to 5Gbps)
differential transmit pair 2
PCI Express (x1) Gen2 (up to 5Gbps)
differential receive pair 2
PCI Express (x1) Gen2 (up to 5Gbps)
differential transmit pair 1
PCI Express (x1) Gen2 (up to 5Gbps)
differential receive pair 1
System power button signal
Assert LP state S3 (sleep) active low
signal
Host CPU PEG (x1) - PCIe Gen3 (up to 8Gbps)
differential transmit pair for external graphics
Host CPU PEG (x1) - PCIe Gen3 (up to
8Gbps) differential receive pair for
external graphics
Notes:
1. Fit-PC3/3i features PCIe REF clock only on these signals
2. Merged with PCI Express signals to Mini PCIe card on fit-PC3/3i
3. Fit-PC3/3i support SATA3.0 with rates up to 6Gbps
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